How to use coe file for initializing BRAM

   Normally we initialize all the memory locations in a BRAM to zero using the "Fill Remaining memory locations" option in core generator. But this article will tell you how to use coe file as an initialization vector. Follow the steps:

1) Create a BRAM of depth = 16 and read and write width = 8 bits.
2) Check the "Load Init File" under the "Memory Initialization" option. Also select the file named "bram_contents.coe".
3) Before clicking on the generate button create a new file named bram_contents.coe and paste the following contents into it:
memory_initialization_radix=10;
memory_initialization_vector=1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16;
In the above text radix means the raidx of the data. I have written decimal data in the vector so my radix is "10". If you want to give the memory contents in binary form then change the coe file like this:

memory_initialization_radix=2;

memory_initialization_vector=0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111;
4) Now click on the generate button.

Tips for running a successful simulation in Xilinx ISim.

        This article covers some basics about running your simulation in Xilinx ISim. It will point out some basic mistakes people do when simulating their code in ISim.

Let’s go step by step, see the images for easier understanding of the steps. Open the images in a new tab in your browser if they are not clear enough.

1) Once the coding is done (both the test bench and the design to be tested) make sure you select the top entity (test bench code) in the Xilinx window as shown below. Many people just select any other file and click the compilation button.
Note down the red markings in the image below. Points to be noted are:

·                     Choose View as simulation.

·                     Select the top entity i.e. the test bench. If the wrong file is selected for simulation then the waveform in ISim will be blank and you will see no waveform.

·                     Double click on the Behavioral check syntax for compiling the design or for finding out any syntax errors.

·                     If the above step is successful then double click on Simulate Behavioral Model. If there are syntax errors in step 3 then you may have to check your code.

Some tips on reducing power consumption in Xilinx FPGA's

Power estimation and power reduction is an important part of any design. Especially in wireless devices, the reduction in power is a very important factor. In this article I will note down some points, on how to reduce the power consumption for xilinx based designs.

   1)  BRAM Enable signal:

Every BRAM has an enable signal which by default is high always. Most of the HDL coders never care to disable it even when the BRAM is not used. But when this enable signal is ON BRAM consumes a lot of power. It doesn't matter whether you change the address or write the data. So always have a control logic which will control the bram enable signal.

   2)  Low power option in coregen for BRAM's:

You can create a BRAM entity file using Xilinx's Core generator software. There are several options available in coregen to help you achieve what you want. For low power designs select the "Low power" option in coregen.

   3)  Decide on LUT or BRAM:

Suppose you want instantiate a memory in your design. Rather than going straight at BRAM or LUT, give it some thought. Xilinx says that for small memory blocks (less than 4 Kbits) LUT consumes less power than BRAM. Similarly for large memory blocks (more than 4 Kbits) BRAM uses less power for its operation than LUT-RAM. So from design to design, switch to LUT-RAM or BRAM depending on the size of memory block.

Synthesised code is too big for the fpga device - What to do?

Synthesised code is too big for the fpga device - What to do?

After lot of hard work you completed your HDL project. The simulation results verified that the code is functionally working. To check how it performs in hardware you synthesis the design. To your bad luck you realize that the code you just wrote is too big for the fpga. What can you do? Don't panic. There are few ways you can tackle this problem.

    1)  If possible choose a higher graded fpga device:

It’s a simple but the easiest thing you can do. Check if the lab or a friend has a better fpga device which can afford your design. If you really don't want to test the design in hardware, but just want to see the synthesis results then simply select the largest device available in the list.

2) Is the fpga out of pins?

Sometimes the synthesis tool will give out an "Out of resources" warning if the design has too many signals in its port list that the device can't support. This happens when you try to input or output large arrays or vectors.

In such cases use a multiplexed input or output system. Rather than inputting everything in one go, do it step wise

3) Changing synthesis tool settings:

By default, the synthesis tool try to optimize your design for both speed and resource usage. But you can change this setting so that the tool will optimize for less resource usage. This may reduce the speed a little, but may significantly reduce the resource usage.

The important things in life

            A philosophy professor stood before his class with some items on the table in front of him. When the class began, wordlessly he picked up a very large and empty mayonnaise jar and proceeded to fill it with rocks, about 2 inches in diameter.

             He then asked the students if the jar was full. They agreed that it was.

           So the professor then picked up a box of pebbles and poured them into the jar. He shook the jar lightly.                                                                                                      The pebbles, of course, rolled into the open areas between the rocks.

He then asked the students again if the jar was full. They agreed it was.

     The professor picked up a box of sand and poured it into the jar. Of course, the sand filled up everything else.

     He then asked once more if the jar was full. The students responded with a unanimous “Yes.”

“Now,” said the professor, “I want you to recognize that this jar represents your life. The rocks are the important things – your family, your partner, your health, your children – things that if everything else was lost and only they remained, your life would still be full.

       The pebbles are the other things that matter – like your job, your house, your car.

   The sand is everything else. The small stuff.”

“If you put the sand into the jar first,” he continued “there is no room for the pebbles or the rocks. The same goes for your life.

      If you spend all your time and energy on the small stuff, you will never have room for the things that are important to you. Pay attention to the things that are critical to your happiness. Play with your children. Take your partner out dancing. There will always be time to go to work, clean the house, give a dinner party and fix the disposal.

     Take care of the rocks first – the things that really matter. Set your priorities. The rest is just sand.”

Inspirational Quotes

“Never do something permanently foolish just because you are temporarily upset.”
-Lily

“Work like you don’t need the money, love like you’ve never been hurt and dance like no one is watching.”
-Randall G Leighton

“In three words I can sum up everything I’ve learned about life: it goes on.”
-Robert Frost

“Don’t be afraid of change. You may end up losing something good, but you will probably end up gaining something better.”
-Unknown

“When one door closes, another opens; but we often look so long and so regretfully upon the closed door that we do not see the one that has opened for us.”
-Alexander Graham Bell

“Yesterday is history. Tomorrow is a mystery. Today is a gift. That’s why it’s called the present.”
-Unknown  (awesome and my favourite one)

A Marriage Story

            My husband is an Engineer by profession, I love him for his steady nature, and I love the warm feeling when I lean against his broad shoulders.

           Three years of courtship and now, two years into marriage, I would have to admit, that I am getting tired of it. The reasons of me loving him before, has now transformed into the cause of all my restlessness.

   I am a sentimental woman and extremely sensitive when it comes to a relationship and my feelings, I yearn for the romantic moments, like a little girl yearning for candy. My husband, is my complete opposite, his lack of sensitivity, and the inability of bringing romantic moments into our marriage has disheartened me about love.

One day, I finally decided to tell him my decision, that I wanted a divorce.

Know if someone is hacking your computer/ Trace a Hacker

Want to know if someone is hacking your computer? Command Prompt can help you find if someone you don't know is connected to your computer stealing private data. Just execute netstat -a and the command prompt will return a list of computers that your computer is connected to. In the results returned, Proto column gives the type of data transmission taking place (TCP or UDP) , Local address column gives the port with which your computer is connected to an external computer and the Foreign Address column gives the external computer you are connected to along with the port being used for the connection. State gives the state of the connection (whether a connection is actually established, or waiting for transmission or is “Timed Out”).

Creating a ZigBee Smart Energy Device with the MSP430F54xx and the CC2530-ZNP (ZigBee Pro Network Processor)

The paper describes how to create a ZigBee Smart Energy Device using the MSP430F54xx as the host application processor to the CC2530-ZNP (ZigBee Pro Network Processor). The physical interface between the MSP430 and the CC2530-ZNP is discussed, as well as the software application framework used to drive the CC2530-ZNP. This paper assumes that the reader is familiar with basic ZigBee concepts and terminology.

The CC2530-ZNP contains the core ZigBee Pro stack and exposes API interfaces to the host processor for configuration of the stack and data transfer. In the sample application installer that is provided by TI, these APIs are abstracted by an application framework called the ZAP (ZigBee Application Processor) framework, which makes it easy for an application developer to write sophisticated ZigBee Smart Energy applications, among others (e.g., Home Automation and manufacturer-specific profiles). TI has provided an extensive framework to make application development easy and thus re-use of this application framework is highly encouraged. However, for application developers that choose to use the CC2530-ZNP but still want to build their application framework from the ground up, the ZigBee Smart Energy sample application suite serves as great reference code of how to interface with the CC2530-ZNP.

click here for the complete details..

Online Resources

Have you ever wondered that there are a lot of virtual resources available on the internet? The present age is an age of ‘CLOUD’. No need to have own pc, no need to buy a software and no need to install it, if you want to work with it. Without having all the above (PC, software and installation) you can get the things done. Yes! Its 100 % true. Here are some examples.

1.  To give a presentation you need to have Microsoft office and a pen drive to carry it. But using the CLOUD resources like GOOGLE DRIVE and SKY DRIVE (from Microsoft) you can do it online and store it in the cloud. You can access the doc from anywhere and at any time, provided you have an account.
2. Sometimes we want to test a circuit or suppose we want to know the working of a circuit, we need to buy all the components and test it physically. And a small change/ damage to any component will lead to faulty results. But using some software you can do it virtually and get the results. But the software needed may be too costly and you need to pay a lot to get access to it.  How about having a virtual software that doesn’t require any buying and installation but still serves our needs?  Isn’t it a great thought? Of course someone like you and me had thought about it before us and came up with a new ONLINE CIRCUITSIMULATOR

FPGAs 'vs.' ASICs Basic Idea

FPGAs 'vs.' ASICs - Basic Idea

The debate on FPGAs vs ASICs has been around for quite a while now, but not without a good reason. The choice could have a significant bearing on the success of your product.
    What you will find below is one opinion of this long in vogue debate, by Vijayakumar Regupathi and Manisha Mankar,  architects - digitaldesign, at Robert Bosch Engineering and Business Solutions.

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We will hold our jump into the debate, in order to first define the two entities to be discussed. The Field-Programmable Gate Array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing—hence the "field-programmable" prefix. On the other hand, an Application-Specific Integrated Circuit (ASIC) is an integrated circuit customized for a particular use, rather than intended for general-purpose use. FPGAs and ASICs can both be configured using the Hardware Description Language (HDL), and most logic functions that an ASIC can perform, can be implemented in an FPGA as well.

How did it all begin?
A little bit on the background will help to set the context for our discussion. In the bygone era, IP routers were, by a great extent,